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AD7328
If a write to one of the range registers is required during a se-
quence, it is necessary to first stop the sequence by writing to
the control register and setting Seq1 to 0 and Seq2 to 0. Next,
the write to the range register should be completed to change
the required range. The previously selected sequence should
then be initiated again by writing to the control register and
setting Seq1 to 0 and Seq2 to 1. The ADC converts the first
channel in the sequence.
Rev. A | Page 26 of 36
Once the control register is configured to operate the AD7328
in this mode, the DIN line can be held low or the write bit can
be set to 0. To return to traditional multichannel operation, a
write to the control register to set Seq1 to 0 and Seq2 to 0 is
necessary.
When Seq1 and Seq2 are both set to 0 or to 1, the AD7328 is
configured to operate in traditional multichannel mode, where
a write to Channel Address Bit ADD2 to Bit ADD0 in the
control register selects the next channel for conversion.
The AD7328 can be configured to convert a sequence of con-
secutive channels (see Figure 45). This sequence begins by
converting on Channel 0 and ends with a final channel as selected
by Bit ADD2 to Bit ADD0 in the control register. In this config-
uration, there is no need for a write to the sequence register. To
operate the AD7328 in this mode, set Seq1 to 1 and Seq2 to 0
in the control register, and then select the final channel in the
sequence by programming Bit ADD2 to Bit ADD0 in the control
register.
DIN: WRITE TFOR ANALOG INPUT CHANNELS.
DOUT: CONRANGE, SINGLE-ENDED MODE.
CS
DITHROUGH SEQUENCE OF CONSECUTIVE CHANNELS.
DORANGE SELECTED IN RANGE REGISTER 1.
CS
DIN: WRITE TFOR ANALOG INPUT CHANNELS.
DORANGE SELECTED IN RANGE REGISTER 1,
SINGLE-ENDED MODE.
CS
DIN: WTO CONVERT THROUGH THE SEQUENCE OF
CONSECUTIVE CHANNELS.
DORANGE SELECTED IN RANGE REGISTER 1.
CS
CHANNEL IN THE CONSECUTIVE SEQUENCE, SET Seq1 = 1
AND Seq2 = 0. SELECT OUTPUT CODING FOR SEQUENCE.
DORANGE SELECTED IN RANGE REGISTER 1,
SINGLE-ENDED MODE.
CS
POWER ON.
DIN TIED LOW/WRITE BIT = 0.
0
OCONTOF CHANNELS.
REGISTER TO STOP THE
SEQUENCE, Seq1 = 0, Seq2 = 0.
FDOUT: CONVERSION RESULT
CS
ASTOPPING
Figure 45. Flowchart for Consecutive Sequence of Channels
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